SiWave joins the Intel Gold Patrner Alliance Program

NAMI generates Intel Platform Designer compliant IP

Implement an AI Neural Network on an ASIC or FPGA in minutes

Quartus Platform Designer compliant Neural Network IP

Nami can now generate a Quartus Platform Designer compliant IP which will further facilitate the rapid deployment of AI neural networks on an FPGA.


STEP 1: Configure and Generate the Neural Network IP using SiWave’s app NAMI


A prerequisite to this step is to generate an inference model. NAMI intuitive GUI interface is used to capture the inference model and system parameters and will automatically check and flag all conflicting settings to make sure that the IP is fully functional. Alternatively, the user can experiment with different parameters, e.g, frequency vs latency, and select the best implementation for their system.


STEP 2: Load IP into Quartus project


Once all neural network and system parameters are entered, NAMI will generate a Platform Designer compliant IP. The IP will need be downloaded and copied to the local IP directory. The IP can then be instantiated into an existing Quartus project through the Quartus IP Catalog list. A number of implementation dependent parameters, e.g, data width, can be configured either when the IP is instantiated or after it is instantiated. The IP contains two simple interfaces for data input and weights and an Avalon streaming interface for data output. Alternatively, the IP can be instantiated into a Platform Designer subsystem to further simplify system design and integration as shown in the video below.

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